iRiser Signal Reference

Signal names are defined by the iRiser firmware for each slot. Always query the live GPIO list after init() rather than assuming a fixed set of names.

Discovering signal names

from sanblaze import riser

device = riser.Riser(0)
device.init()
bits = device.get_bits(raw=True)
for bit in bits.bits:
    print(f'{bit.name:12} dir={bit.dir} val={bit.val}')

Alternatively, call show_bits() to print the current GPIO state to the log.

Name matching

add_transition() matches signal names case-insensitively (12v and 12V are equivalent). Invalid names return:

{'status': 1, 'reason': '<name> is a not a valid signal name'}

set() and clear() pass the name to the iRiser CLI in uppercase (for example 12VEDSF). Use names from get_bits(); slot-specific names such as 12VEDSF may appear on EDSFF configurations even if they are not listed in the table below.

Common signals

The table below lists GPIO names used in SANBlaze tests and examples. Your slot may expose a subset depending on form factor and iRiser configuration.

PCIe reset and clock

Name	Typical use
`perst0l`	PERST# (primary port, active-low naming)
`clkreql`	Clock request
`p0clkl`	Port 0 refclk enable (active-low naming)
`p1clkl`	Port 1 refclk enable (dual-port)

Power and reset

Name	Typical use
`12v`	12 V rail enable
`12VEDSF`	12 V EDSFF enable (some EDSFF slots)
`3v3`	3.3 V auxiliary enable
`smrstl`	SMBus reset
`pwrdis`	PWRDIS

Presence and form factor

Name	Typical use
`prsntl`	Device present
`dualptl`	Dual-port indicator
`mfgedsf`	M.2 / EDSFF form-factor detect
`plaedsf`	EDSFF PLA detect
`plnedsf`	EDSFF PLN detect
`rfuedsf`	EDSFF RFU detect
`lededsf`	EDSFF activity LED

User test outputs (LED mirroring)

Name	Typical use
`usr0tst`	User test output 0
`usr1tst`	User test output 1 (often mirrored with PERST)
`usr2tst`	User test output 2
`usr3tst`	User test output 3

Sideband and debug

Name	Typical use
`statusl`	Status LED
`usbdisl`	USB disable
`sb0gpio`	Sideband GPIO 0
`sb1gpio`	Sideband GPIO 1
`sb2gpio`	Sideband GPIO 2

PCIe lanes (advanced)

Name	Typical use
`tx0n` … `tx3p`	Lane 0–3 TX differential pairs (n/p)

Direction and value semantics

Bit direction

Each Bit has dir of 'I' (input) or 'O' (output). Before driving PERST or refclk in low-level scripts, set the pin as output:

bits = device.get_bits(raw=True)
bits = bits.set_dir('perst0l', 'O')

`add_transition` state argument

In add_transition():

'on' — set the signal bit in the GPIO value mask
'off' — clear the signal bit in the GPIO value mask
final=True — on the last transition, set the next action to stop

`toggle_bit`

toggle_bit() inverts the value of a single named bit while preserving other bits. Use this when building edit_action chains in refclk and PERST timing scripts.

Aggregated masks

get_bits() with raw=True returns a Bits object. Its dir and val attributes are hex strings passed to edit_action().

See Examples for high-level and low-level programming examples.